Power semiconductor devices are well known to those of ordinary skill in the art and are commonly used for electronic power conversion, regulation, and control. As building blocks of power systems, power semiconductor devices operate in both a switching mode and a linear mode. Power semiconductors satisfy such conflicting requirements as low weight and volume, high circuit-level reliability, fault isolation, and diagnostic capabilities.
Power transistors are a type of power semiconductor that is used in a variety of applications in the power range from watts to megawatts. While the majority of applications use power semiconductors in switched mode, other applications require devices to operate in the linear region. Such applications include constant-current capacitor charging and discharging, gradual voltage build up at the load (“soft start”), and switching of inductive loads.
For example, an application for a controlled mode power system can be found in “Intelligent Power System,” Ser. No. 10/692,580, filed Oct. 24, 2003, inventors Boris S. Jacobson et al., published as U.S. 2004/0095023 on May 20, 2004. The contents of this patent application are hereby incorporated by reference.
For example, FIG. 1 shows an example of a transistor Q that works in the linear mode by charging a capacitor bank C1-Cn from a voltage source Vin, and FIG. 2 is a graph showing parameters for the transistor circuit of FIG. 1. Prior to t0, the transistor blocks the source voltage. At the moment t0 the transistor gradually turns on and starts charging the capacitor bank. During the time interval t0−t1, a linearly decaying voltage is applied to the transistor that conducts constant current. The power dissipated by the transistor is P=1/(t1−t0)∫I V(t) dt where v(t) is the voltage across the transistor, the integration interval is from t0 to t1, and I is the constant current through the transistor.
A problem associated with a type of power transistors known as a metal oxide semiconductor field effect transistors (MOSFETs), as well as with Insulated Gate Bipolar Transistors (IGBTs) is that they can be optimized as switches and cannot sustain continuous power dissipation associated with operation in the linear mode. One reason for this is a phenomenon called hot spotting or current tunneling. For an ideal device, both current density and temperature profile across the die are generally uniform. However, non-uniform doping and voids in the die attachment material can produce variations in the current density and temperature across the device. A transistor gate threshold voltage Vth typically has a negative temperature coefficient. Consequently, when some locations of the die (particularly near the center of the die) start running at a higher temperature, Vth of these drops and the transistor gain Gm forces a localized increase of current density. The higher current causes further gain increase that ultimately results in the thermal runaway and catastrophic failure of the device. Thus, current tunneling effectively prevents using presently available MOSFETs and IGBTs in linear applications.
For example, FIG. 3 is a graph of transistor gate threshold voltage as a function of temperature, for a transistor such as the transistor Q of FIG. 1. As FIG. 3 shows, the transistor gate threshold voltage Vth has negative temperature coefficient. Consequently, when some locations of the die (particularly near the center) start running at a higher temperature, the Vth of these locations drops, and the transistor gain Gm forces a localized increase of current density. The higher current causes further gain increase that ultimately results in the thermal runaway and catastrophic failure of the device.
As another example, FIG. 4 is a graph of transistor gate to source voltage versus junction temperature curves for various drain currents, for a transistor such as the transistor of FIG. 1. The value of Id corresponding to the zero-slope curve in FIG. 4 is called the crossover current Icrc. One of the most effective methods to improve transistor performance in the linear mode is to reduce its crossover current.
MOSFET devices fabricated using the latest processing techniques tend to have lower gate charge, lower gate to drain charge, and lower on resistance RDSon than the earlier generation devices. For example, Table 1 shows crossover current for three generations of APT5010 MOSFET made by Advanced Power Technology (APT). The APT5010LLC made using the latest MOS VI® process has lower gate charge, lower gate to drain charge, and lower on resistance RDSon than the earlier generation devices. Unfortunately, as switching performance of this device improves, the crossover current increases and its linear operation deteriorates. It can thus be seen that current tunneling effectively prevents using current MOSFETs and IGBTs in linear applications.
TABLE 1Transistor Crossover Current for Various ProcessesDeviceCrossover CurrentProcessAPT5010JN 15 AMOS IV ®APT5010JVR 62 AMOS V ®APT5010LLC100 AMOS VI ®
Another area where a conventional power semiconductor device can experience problems is in its safe operating area. Generally, a Forward Biased Safe Operating Areas (FBSOA) curve defines the maximum drain voltages and currents a power device can sustain during its turn on or under forward-biased conditions. A Reverse Biased Safe Operating Areas (RBSOA) curve defines the peak drain current and voltage under inductive load turn off when the transistor drain voltage is clamped to its rated drain to source breakdown voltage BVDSS. FIG. 5 is an illustrative graph of forward biased safe operating area (FBSOA) curves, and FIG. 6 is an illustrative graph of reverse biased safe operating area (RBSOA) curves.
It might be expected that a transistor has to operate within fixed boundaries of the FBSOA and RBSOA under all conditions. However, the FBSOA and RBSOA curves limit only the maximum drain to source voltage ratings. Otherwise, as opposed to indicating absolute limits for a device, the curves represent areas of “acceptable” reliability often expressed as Mean Time Between Failures (MTBF). Also, the FBSOA curves normally show data for a single current pulse and several different pulse widths at the case temperature of 25° C. Because most applications need continuous operation and higher case temperature, the FBSOA has to be recalculated for every specific case.
As a result, many designs can not tolerate changed environmental or circuit conditions such as operating at a higher junction temperature in an emergency with reduced coolant flow or providing higher current to a stalled motor. One way of providing a power semiconductor device that can tolerate changed environmental conditions is to provide a device that that is oversized for the application. However such oversizing still does not prevent the devices from being underused in one mode of operation and overstressed in another.
At present, power transistors suffer from a lack of diagnostics and prognostics wherein it is difficult to determine if anything is wrong with working power semiconductors. Failed devices can be examined after the fact to determine possible causes of failure. The common prediction method of power transistor reliability relies on the device junction temperature. The prediction method is based on theoretical models and does not take into account either fabrication defects or actual operating conditions. For example, the existing method for predicting power transistor reliability would not account for a device failure caused by overstressed die contact to the substrate or faulty mounting to the heat sink. Further, no methods of inspecting and calibrating installed transistors according to their power handling capability exist at the present time.